By alx2000
Mon Nov 17, 2008 4:46 pm
Further investigation into the bowels of the MPC 1000 service manual revealed the cpu this thing uses is the hd6417727f160. The manual for that reveals the following info:
Bus state controller (BSC)
• Physical address space divided into six areas (area 0, areas 2 to 6), each of
up to 64 Mbytes, with the following features settable for each area:
* Bus size (8, 16, or 32 bits)
* Number of wait cycles (hardware wait function also waited)
* Direct connection of SRAM, synchronous DRAM, and burst ROM
possible by designating memory to be connected to each area
* Supports PCMCIA interface (2 channels)
* Chip select signals (CS0, CS2CS6) for relevant area
• Synchronous DRAM refresh function
* Programmable refresh interval
* Supports CAS-before-RAS refresh and self-refresh modes
* Supports power-down DRAM
• Synchronous DRAM burst access function
• Big endian or little endian can be specified
So it could be 16 bit or 32 but addressable, but I am going to assume it is 32 bit.
There are 6 possible 'channels' of 64M memory available. We know there is 64M flash onboard, so that's one channel. There is 16M of onboard DRAM, so that's the second channel. So that leaves 4 channels of 64M addressable memory available. This could be 256M of sodimm. So it is worth trying a 256M sodimm that is to spec. 256M, 8 chips of dram at 16Mx16 each. However, it is highly probable that only two addressable memory channels can be assigned per sodimm slot. So in other words, they could have put two sodimm slots in there and used all four channels, but didn't. So two 64M addressable memory channels are going unused. What it also unfortunate is that the onboard dram of 16M are also going unused, and consuming a 64M channel once a sodimm in inserted. What this also means however is that a single 128M sodimm should provide 128M of memory, as long as it consists of chips having no higher density than 16M. At this point, finding one of those is probably harder than just buying a 256M sodimm though.
So oh well, I'll update when I have given it a try. Worst case scenario, I learned why the MPC 1000 has a 128M limitation, and that it has nothing to do with reading half of the sodimm.
Bus state controller (BSC)
• Physical address space divided into six areas (area 0, areas 2 to 6), each of
up to 64 Mbytes, with the following features settable for each area:
* Bus size (8, 16, or 32 bits)
* Number of wait cycles (hardware wait function also waited)
* Direct connection of SRAM, synchronous DRAM, and burst ROM
possible by designating memory to be connected to each area
* Supports PCMCIA interface (2 channels)
* Chip select signals (CS0, CS2CS6) for relevant area
• Synchronous DRAM refresh function
* Programmable refresh interval
* Supports CAS-before-RAS refresh and self-refresh modes
* Supports power-down DRAM
• Synchronous DRAM burst access function
• Big endian or little endian can be specified
So it could be 16 bit or 32 but addressable, but I am going to assume it is 32 bit.
There are 6 possible 'channels' of 64M memory available. We know there is 64M flash onboard, so that's one channel. There is 16M of onboard DRAM, so that's the second channel. So that leaves 4 channels of 64M addressable memory available. This could be 256M of sodimm. So it is worth trying a 256M sodimm that is to spec. 256M, 8 chips of dram at 16Mx16 each. However, it is highly probable that only two addressable memory channels can be assigned per sodimm slot. So in other words, they could have put two sodimm slots in there and used all four channels, but didn't. So two 64M addressable memory channels are going unused. What it also unfortunate is that the onboard dram of 16M are also going unused, and consuming a 64M channel once a sodimm in inserted. What this also means however is that a single 128M sodimm should provide 128M of memory, as long as it consists of chips having no higher density than 16M. At this point, finding one of those is probably harder than just buying a 256M sodimm though.
So oh well, I'll update when I have given it a try. Worst case scenario, I learned why the MPC 1000 has a 128M limitation, and that it has nothing to do with reading half of the sodimm.
